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dc.contributor.authorSan, İsmail
dc.contributor.authorAt, Nuray
dc.date.accessioned2019-10-21T20:12:13Z
dc.date.available2019-10-21T20:12:13Z
dc.date.issued2014
dc.identifier.issn1383-7621
dc.identifier.issn1873-6165
dc.identifier.urihttps://dx.doi.org/10.1016/j.sysarc.2013.10.013
dc.identifier.urihttps://hdl.handle.net/11421/20429
dc.descriptionWOS: 000337212500004en_US
dc.description.abstractSecurity protocols such as IPSec, SSL and VPNs used in many communication systems employ various cryptographic algorithms in order to protect the data from malicious attacks. Thanks to public-key cryptography, a public channel which is exposed to security risks can be used for secure communication in such protocols without needing to agree on a shared key at the beginning of the communication. Public-key cryptosystems such as RSA, Rabin and ElGamal cryptosystems are used for various security services such as key exchange and key distribution between communicating nodes and many authentication protocols. Such public-key cryptosystems usually depend on modular arithmetic operations including modular multiplication and exponentiation. These mathematical operations are computationally intensive and fundamental arithmetic operations which are intensively used in many fields including cryptography, number theory, finite field arithmetic, and so on. This paper is devoted to the analysis of modular arithmetic operations and the improvement of the computation of modular multiplication and exponentiation from hardware design perspective based on FPGA. Two of the well-known algorithms namely Montgomery modular multiplication and Karatsuba algorithms are exploited together within our high-speed pipelined hardware architecture. Our proposed design presents an efficient solution for a range of applications where area and performance are both important. The proposed coprocessor offers scalability which means that it supports different security levels with a cost of performance. We also build a system-on-chip design using Xilinx's latest Zynq-7000 family extensible processing platform to show how our proposed design improve the processing time of modular arithmetic operations for embedded systemsen_US
dc.language.isoengen_US
dc.publisherElsevieren_US
dc.relation.isversionof10.1016/j.sysarc.2013.10.013en_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectPublic-Key Cryptographyen_US
dc.subjectModular Arithmeticen_US
dc.subjectAccelerationen_US
dc.subjectFpgaen_US
dc.subjectSystem-On-Chipen_US
dc.titleImproving the computational efficiency of modular operations for embedded systemsen_US
dc.typearticleen_US
dc.relation.journalJournal of Systems Architectureen_US
dc.contributor.departmentAnadolu Üniversitesi, Mühendislik Fakültesi, Elektrik ve Elektronik Mühendisliği Bölümüen_US
dc.identifier.volume60en_US
dc.identifier.issue5en_US
dc.identifier.startpage440en_US
dc.identifier.endpage451en_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.contributor.institutionauthorAt, Nuray


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